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Senior DFT Engineer - Design for Testability / Semiconductors

Job Title
Senior DFT Engineer - Design for Testability / Semiconductors
Job ID
Munich, GERMANY,  BY
Other Location

Our German client, a leading worldwide supplier of high performance semiconductor sensor solutions is in search of a:

Senior DFT Engineer - Design for Testability / Semiconductors



  • From project start define DFT strategy in analog (primarily) and digital domain
  • Interact with test engineers, technical leads and designers to identify limitations of test hardware: design and find optimum DFT and ASIC observability solutions
  • Evaluate possible failure modes and define test modes to debug and mitigate failure modes
  • Define all test modes that can allow extended testing of the ASIC
  • Implement and verify DFT schemes
  • Perform test coverage analysis
  • Define DFT cook-book to all designers with best DFT guidelines


  • Master’s degree in Electrical / Computer Engineering with 10 years  of experience in Design for Test, or a Bachelor’s degree with 15 years of experience
  • Excellent failure mode analysis skills
  • Experience on ATE and debug
  • Knowledge of analog and mixed signal design
  • Knowledge of ATPG, scan insertion, coverage improvement, BIST and related simulations.
  • Collaborative and respectful team player, passionate about achieving team goals
  • Excellent communication skills (both oral and written) are required
  • Experience with relevant CAD tools
Required Skills

University degree
Experience in Design for Test
Failure mode analysis
ATE and debug
Analog and mixed signal design
ATPG, scan insertion, coverage improvement, BIST
Optional Skills

German language skills

Option 1: Create a New Profile


Albelissa S.r.l.
Headquarters: Via Rivoli 14, 10090 Rosta (TO) - Italy
Albesun India Private Limited
Plot #13, Phase-II, Kavuri Hills,
Hyderabad, 500081
Albelissa S.r.l. RO
Strada Rariştei 7, Sector 2,
022626 Bucharest

IT: +39 011 1966 3400

DE: +49 914 2807 3599

FR: +33 970 440 789

US: +1 415 529 7659

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